Formula used
For a common unipolar DAC, output follows the selected code ratio. The denominator is either 2ᴺ or 2ᴺ − 1. Practical corrections are then applied to the ideal result.
Ideal voltage: Vout = Vmin + (Vmax − Vmin) × D ÷ denominator.
LSB size: LSB = (Vmax − Vmin) ÷ denominator.
Loaded voltage: Vload = Vsource × Rload ÷ (Rsource + Rload).
Load current: Iload = Vload ÷ Rload.
How to use
Select whether you know the code or desired voltage. Choose the DAC resolution and coding format. Enter the reference and output range values.
Add optional errors, loading, and amplifier limits. Include settling data when update speed matters. Press Calculate to generate detailed engineering results.
Review warnings before using the result in hardware. Export the report when documentation is required. Always confirm limits using the DAC datasheet.
Example data
| Example | Resolution | Code | Reference | Ideal output |
|---|---|---|---|---|
| 8-bit midpoint | 8 bits | 128 | 5.000 V | 2.509804 V |
| 10-bit quarter scale | 10 bits | 256 | 3.300 V | 0.825806 V |
| 12-bit three-quarter scale | 12 bits | 3072 | 4.096 V | 3.072750 V |
| 16-bit near full scale | 16 bits | 60000 | 2.500 V | 2.288853 V |
Frequently asked questions
What does DAC resolution mean?
Resolution is the number of digital bits available. More bits create more output levels. Each additional bit doubles available code steps.
Why can full-scale output differ from Vref?
Some DACs divide the code by 2ᴺ. Their maximum code remains one LSB below Vref. Datasheet transfer functions determine the exact behaviour.
What is an LSB?
An LSB is the smallest nominal output step. It depends on span and resolution. Smaller LSB values provide finer voltage control.
What is quantisation error?
Quantisation error is the difference between requested and achievable voltage. Rounding usually limits it near half an LSB. Practical errors can increase it.
What is offset binary?
Offset binary maps the lowest code to negative full scale. Midscale normally represents zero volts. The highest code approaches positive full scale.
How does two's-complement coding work?
The most significant bit represents the sign. Positive and negative values use different code ranges. This calculator converts raw and signed codes.
Why does load resistance affect output?
Finite output resistance forms a voltage divider. Lower load resistance causes greater voltage loss. A buffer amplifier can reduce loading effects.
What are INL and DNL?
INL measures deviation from the ideal transfer line. DNL measures step-size variation between adjacent codes. Large DNL can cause missing codes.
How should settling time be used?
Settling time limits reliable update speed after code changes. Slew rate may add further transition delay. Use the slower calculated time limit.