Phase Noise to Jitter Calculator

Convert phase noise data into RMS jitter, inspect bandwidth contributions, combine sources, plot results, validate inputs, and export clear engineering reports instantly online today.

Calculator inputs

dBc

Integration and measurement options

dBc/Hz

Phase-noise measurements

OffsetPhase noiseLabelIncludeSpurAction
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
Columns may contain offset, noise, label, include, and spur.

Additional jitter sources

Source nameRMS jitterUnitAction

ADC jitter limits

dB

Formula used

Phase noise first becomes linear spectral density. The selected bandwidth is then integrated. Sideband convention sets the variance multiplier.

Linear integrated noise: A = ∫ 10L(f)/10 df

RMS phase jitter: σφ = √(kA)

RMS time jitter: σt = σφ ÷ (2πfc)

Jitter-limited SNR: SNR = −20 log10(2πfinσt)

The factor k equals two for SSB data. It equals one for DSB data. Confirm your instrument convention before final design decisions.

How to use

  1. Choose raw points or integrated phase-noise mode.
  2. Enter the carrier frequency and integration limits.
  3. Add phase-noise rows in ascending offset order.
  4. Select interpolation, integration, spurs, and floor handling.
  5. Add independent RMS jitter sources when required.
  6. Enter ADC frequency and target SNR values.
  7. Calculate, inspect warnings, graphs, and segment results.
  8. Copy, print, or export the engineering report.

Example data

This sample describes a generic 100 MHz clock. It spans ten hertz through ten megahertz. Replace every value with measured device data.

Offset frequencyPhase noiseDescription
10 Hz−70 dBc/HzClose-in region
100 Hz−90 dBc/HzLow-offset region
1 kHz−110 dBc/HzTransition region
10 kHz−125 dBc/HzMid-offset region
100 kHz−140 dBc/HzFloor approach
1 MHz−150 dBc/HzFar-out region
10 MHz−155 dBc/HzNoise floor

Frequently asked questions

What is phase noise?

Phase noise describes short-term carrier phase fluctuations. Instruments usually report it in dBc per hertz. Lower values generally indicate a cleaner oscillator spectrum.

Why must integration limits be stated?

Every offset region contributes different noise energy. Wider bandwidth usually increases the integrated jitter result. Always compare values using identical integration bandwidths and conventions.

What is the SSB multiplier?

SSB measurements describe noise on one carrier side. Both sidebands contribute to total phase variance. Therefore this calculator applies a factor of two.

Should discrete spurs be included?

Include spurs when they affect system timing performance. Exclude them for random-noise-only comparisons when required. Document that choice beside every published jitter result.

Which interpolation method is best?

Log-frequency interpolation suits common phase-noise plots. Linear-frequency interpolation may fit special measured datasets. Compare methods when points are widely separated in frequency.

Can total jitter recreate phase noise?

No single jitter value defines a complete spectrum. Many different spectra can share equal integrated energy. Preserve the original measurement data for detailed analysis.

How are independent jitter sources combined?

Independent RMS sources combine through root-sum-square addition. Correlated sources require a more detailed timing model. Never add independent RMS jitter values directly together.

What does jitter-limited ADC SNR mean?

Sampling uncertainty limits achievable converter signal quality. Higher input frequencies become more sensitive to jitter. Other ADC noise sources can reduce practical SNR further.

Is peak-to-peak jitter exact?

No universal multiplier converts RMS jitter exactly. The estimate depends on probability and observation time. Select a multiplier matching your required confidence assumptions.

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Important Note: All the Calculators listed in this site are for educational purpose only and we do not guarentee the accuracy of results. Please do consult with other sources as well.